Joe Gorse
2016-09-10 16:19:29 UTC
Greetings,
I am looking for references related to the mapping of causal relationships
between the execution of discrete machine instructions and the data,
particularly for the identification of the boundaries in the input data for
altering control flow.
I have just started a brief search and came across the notion of Generate,
Test and Debug
<http://link.springer.com/chapter/10.1007%2F978-3-642-77927-5_5>. It seems
vaguely related though I am not sure that I am getting the terminology
correct.
The idea is to inform the computer enough about its own capabilities, in
terms of read/write/branch operations, that it can statically infer the
execution flow of the binary blob and the data inputs which can alter the
control flow (and ultimately the data outputs).
In any circumstance in which the internal models for the performance are
insufficient to predict the next state, the code piece may be executed
under varying input circumstances via simulator/virtualization/baremetal to
map and characterize what sort of data boundaries exist for the control
flow. This method could also be used initially to map the hardware
capabilities to the software representation.
The value, which I hope is becoming apparent, would be more informative
debugging and eventually developing & debugging simultaneously.
So if anyone has any good references or thoughts related to this, I would
love to hear from you.
Cheers,
Joe Gorse
C: 440-552-0730
LI: Joe Gorse <http://www.linkedin.com/pub/joe-gorse/7/12/397>
I am looking for references related to the mapping of causal relationships
between the execution of discrete machine instructions and the data,
particularly for the identification of the boundaries in the input data for
altering control flow.
I have just started a brief search and came across the notion of Generate,
Test and Debug
<http://link.springer.com/chapter/10.1007%2F978-3-642-77927-5_5>. It seems
vaguely related though I am not sure that I am getting the terminology
correct.
The idea is to inform the computer enough about its own capabilities, in
terms of read/write/branch operations, that it can statically infer the
execution flow of the binary blob and the data inputs which can alter the
control flow (and ultimately the data outputs).
In any circumstance in which the internal models for the performance are
insufficient to predict the next state, the code piece may be executed
under varying input circumstances via simulator/virtualization/baremetal to
map and characterize what sort of data boundaries exist for the control
flow. This method could also be used initially to map the hardware
capabilities to the software representation.
The value, which I hope is becoming apparent, would be more informative
debugging and eventually developing & debugging simultaneously.
So if anyone has any good references or thoughts related to this, I would
love to hear from you.
Cheers,
Joe Gorse
C: 440-552-0730
LI: Joe Gorse <http://www.linkedin.com/pub/joe-gorse/7/12/397>